The dead spot in my EPROM eraser turned out to be me

Spectroline PL-265T ultraviolet EPROM eraser on a workshop bench, data plate reading Spectronics Corporation, Westbury New York, 115 volts, with a rotary timer dial on top.

Part 2 of 2. Part 1 is the borrowed cabinet, the method, and three predictions I wrote down before I knew anything. This one is my own eraser, and the scorecard.

Last time I borrowed a cabinet-sized Spectroline from a local collector, programmed a stack of M27C512s to all zeros, and used them as instruments to find out what a UV eraser actually delivers. The answer for that machine was seventy-five seconds—against a rule of thumb that says ten minutes.

Then I wrote down three predictions about my own eraser, which was still in transit.

Two of them are now wrong. And along the way I found what looked like a dead spot in my eraser—a position where chips came out completely unerased—built a careful case against the machine, and then discovered the fault was mine. That's the part of this post you should actually care about, because a blank check will never warn you about it. I found it because I went looking. That is the only reason I found it.

The unit

It arrived on the Wednesday. Small, two 6 W tubes, nothing like the borrowed cabinet—the kind of thing that sat next to a service bench in 1993 and has been in somebody's garage since.

Cosmetically rough, as advertised. I stripped it, cleaned it, and put it back together.

Spectroline PL-265T ultraviolet EPROM eraser on the workshop bench.

A service-bench tool from 1993 that has spent most of the years since in somebody's garage.

Then the acceptance run, in the order that matters:

Interlock. Start a cycle, open it, lamps die. Immediately. Nothing else happens until that passes, and it passed.

Do the lamps strike? They did—on the original tubes. That single observation answers the question the return window was really about. If the old tubes light, the ballast and the wiring are sound, and any tube problem is a cheap-consumable problem rather than a send-it-back problem.

How long is a minute? Here it got interesting, and it's the reason I now time every eraser at more than one setting.

Dial setting Stopwatch Error
15:00 14:33 3% fast
30:00 32:00 6.7% slow

Read that twice. The error doesn't just vary—it changes sign across the dial. At fifteen minutes the timer is short-changing you; at thirty it's being generous. Somewhere around eighteen or twenty minutes it's exactly right, and there is no correction factor you can apply.

The borrowed cabinet ran a flat 18% fast, which at least you can multiply your way out of. This one you cannot. If you care about the number, you have to time the setting you actually use—and I still need to go back and time mine at four minutes, because neither of those two points is anywhere near it.

The timer also doesn't ding. The bell is seized or missing. It cuts the lamps correctly, which is the part that matters.

Close-up of the PL-265T rotary timer dial marked 0, 15, 30 and 45 minutes, with the paint chipped away around the dial face.

The dial. Three percent fast at fifteen minutes, six point seven percent slow at thirty, and no single correction factor that fixes both.

A better experiment than the one I planned

The replacement tubes hadn't arrived.

I'd ordered them days earlier, sight unseen, on the entirely reasonable assumption that thirty-year-old lamps in a garage-stored eraser would be worn out. The plan was to fit them on arrival and characterize the machine properly.

Their being late turned out to be the best thing that happened all day, because it meant I had one chance—one—to measure what a set of original, thirty-year-old tubes actually delivers before they came out and went in the bin. Nobody publishes that number. You cannot get it after the fact.

So I ran the full protocol on the old tubes.

Original Spectronics BLE-6254S ultraviolet tube with clear glass and a light amber deposit at the electrode inside the end cap.

One of the originals—Spectronics BLE-6254S, Westbury, New York. Clear glass, a little end-darkening at the electrode, and thirty years of service behind it.

Prediction one: three to eight minutes

Wrong.

I ran the bracket the same way as last time: single continuous exposures, a freshly programmed chip for every point, no ladders, lamp pre-warmed.

Exposure Failing bytes Result
4:00 0 blank
2:00 0 blank
1:00 65,536 nothing at all
1:30 65,536 nothing at all
1:45 10 ten cells left

The threshold is somewhere around one minute fifty.

Not three to eight minutes. Under two. I'd guessed high by a factor of two or three—and if you read Part 1 you'll remember that the estimate I'd have given before any of this was twenty-six minutes, straight off the datasheet dose, for a cabinet that cleared a chip in ninety seconds.

So that's twice now, and both times in the same direction—every estimate I've made on paper has come out too slow. Two points isn't a bias, and I won't dress it up as one. But it's enough to stop me treating the datasheet's 15 W-sec/cm² as anything but a guaranteed-worst-case number, which is a very different thing from a physical threshold.

The other thing in that table is the cliff again. Nothing at 1:30. Ten cells short of perfect at 1:45. Fifteen seconds. The borrowed cabinet crossed in about the same fifteen. Two completely different machines, two completely different lamps, and the same shape: an EPROM does not erase gradually, it erases all at once, and the only question is when.

And here's what surprised me most. These two machines are nothing alike—a cabinet with a serpentine grid lamp versus a small box with two 6 W tubes—and their thresholds are thirty-five seconds apart. Seventy-five seconds versus a hundred and ten. After all that, the honest summary is that both of them do the job in under two minutes, and the folklore is wrong by an order of magnitude for both.

Warm-up, measured properly this time

In Part 1 I reported that lamp temperature matters, but the evidence was circumstantial—two exposures in the same session that differed in lamp state and also in how many chips were on the shelf.

This time I got it cleanly, and by accident. I ran 1:45 without pre-warming, realized the mistake, and ran it again properly on a fresh chip.

Same 1:45, same position Failing bytes
Cold lamp 65,536
Pre-warmed lamp 10

Same duration. Same position. Same chip type, same programming, same blank check. One variable.

Cold, that exposure erases nothing whatsoever. Warm, it very nearly finishes the job. That is close to the entire range of the curve, and it comes purely from whether the lamp had been running beforehand.

If you take one procedural thing from these two posts, take that one. A short exposure spends most of itself warming up, which is why chunked ladders don't add and why your first load of the day is not getting what your fifth load gets. It turns out that's truer than I realized when I first wrote it—see the update at the end.

Prediction two: bit 7 will lag again

Also wrong. And this is the one I most wanted to be right.

On the borrowed cabinet, a chip caught with 72 failing bytes read 7F almost all the way down—the same bit trailing across the whole array, which looked like it might be a fact about how these dies are laid out.

On this machine, the ten survivors read like this:

DDA2  FE      EDD8  BF
DDA3  FE      EDD9  BF
DE22  FE      EE58  BF
DE23  FE      EE59  BF
              EED9  BF
              EF59  BF

Needham's EMP-20 blank check screen on a CRT monitor reading Errors Counted: 10, listing device addresses DDA2 through EF59 with device data of FE and BF against buffer data of FF.

The whole finding on one screen. Ten failing bytes out of 65,536—four reading FE, six reading BF, and every address in a pair 0x80 from the next.

FE is bit 0. BF is bit 6. Bit 7 doesn't appear at all. So it isn't a property of the part number, and my prediction was straightforwardly wrong. (If those values need decoding, the bit-flip primer covers it.)

But look at what's there instead, because it's better than what I was looking for.

Within each cluster, the failures sit on a 128-byte stride. DDA2/DDA3, then exactly 0x80 later, DE22/DE23. In the second cluster EDD8/EDD9, 0x80 later EE58/EE59, then EED9 and EF59, each a further 0x80 on—though those last two are singletons, with nothing at EED8 or EF58 to pair with.

The two clusters themselves are nowhere near each other: about 0xFB5 apart, four thousand bytes. So the 128-byte period is a local structure inside a neighborhood, not a pattern running through the whole array. I want to be precise about that, because "every gap is 0x80" is the tidier claim and it isn't true.

Each cluster does have its own bit. Everything in the DDDE neighborhood is bit 0. Everything in the EDEF neighborhood is bit 6. The bit doesn't wander within a cluster.

A 128-byte stride looks more like a row or column in the physical array than an accident of the data, which would put the slow cells in clusters on the die, each cluster happening to sit on one bit line. On the borrowed cabinet's chip that region happened to be bit 7's; here there were two regions and neither was.

That's a story, not a result. It rests on ten failing cells, on one chip, from one machine, and I'd want it on a dozen more before I'd defend it. What I'll say with more confidence is the weaker version: the specific bit was never the interesting part—the clustering is. Weak cells don't appear to be scattered at random.

I'd be glad to be corrected by anyone who has looked at more of these than I have. But I'll take a wrong prediction that produces a sharper question over a right one that produces nothing.

Read instability, on a second machine

Small confirmation, worth recording. That ten-error chip, read four times with no ultraviolet in between:

10 · 9 · 10 · 10

One cell, flipping. Sitting right at the sense threshold and reading differently depending on temperature or noise or timing. Same effect I saw on the borrowed cabinet at 38 and 41 errors, but at ten errors it resolves down to a single identifiable cell—and the same gremlin as the intermittent fault that wouldn't come back across five programmers.

And the chip stayed failing throughout—consistent with the negative result from Part 1, where a chip that had just barely passed read rock steady five times running. The instability is a feature of chips mid-transition. It is not a margin test, and I still can't give you one.

The thing I would never have found

Now the finding that actually matters.

With a threshold around 1:50, the working setting is four minutes—a bit over twice the threshold, which is the rule I gave last time. So I loaded five chips, spread across the foam, and ran four minutes with the lamp pre-warmed.

Position Failing bytes
Centre 0
Inboard left 0
Inboard right 0
End of the foam, left 65,536
End of the foam, right 65,536

Not "worse." Not "a bit marginal." Sixty-five thousand five hundred and thirty-six—every byte in the chip, identical to a control that never went in the machine.

Numbered M27C512 EPROMs spaced across the anti-static foam pad in the eraser tray, some at the centre and some at the far end.

Five chips, one run, four minutes. The ones in the middle came out blank. The ones at the end came out untouched.

At more than twice the threshold, on the same pad, in the same run, two chips received effectively no ultraviolet at all.

I didn't believe it, so I tested it the hard way. I took those same two chips, moved them about one chip-length in from the end and slightly off the side edge—still on the same foam, same height—and ran four minutes without pre-warming the lamp, deliberately handicapping them.

Both came out completely blank.

That confirms the effect is positional. It does not locate it—I moved on both axes at once, so at this stage I couldn't tell you whether it was the end of the pad, the side edge, or the corner where the two meet.

So: end of the foam, pre-warmed, four minutes—nothing erased. One chip-length inboard, cold, four minutes—perfect. Position beats thermal state so completely it isn't a contest. That end of the pad isn't dim. It's dark.

At that point I had it worked out. The lit area is smaller than the foam. The pad has a strip at one end that looks exactly like usable space, sits at exactly the right height, and does nothing. My eraser has a coverage limitation nobody documents. I had the table, I had the confirming run, I had a title.

Except the eraser was fine

The tray was in backwards.

The foam insert doesn't sit centred in its pan. It's offset, with a strip of bare metal at one end. Put the tray in the right way round and that offset sits where the lamps aren't, which is precisely the point of it. Put it in the wrong way round, as I had, and the offset lands at the opposite end and pushes the whole loading area about one chip-length out from under the light.

End of the eraser tray showing one numbered EPROM sitting on bare metal past the edge of the foam pad, with the other chips on the foam itself.

The whole explanation. The foam doesn't sit centred in the pan—there's bare metal at one end. In backwards, that offset pushes the loading area out from under the lamps by about one chip-length.

One chip-length. Which is, near enough, exactly the distance I had shifted those two chips to make them erase.

So there is no dead zone. There is a tray, installed backwards by me, holding chips where the lamps don't reach—and I spent an afternoon building a meticulous, evidence-based case against a machine that was working correctly the entire time.

I said in the first version of this post that I'd tested the fix by eye and not by chip, and that I'd update this line once I had a number. I have it now, and it's in the last section—because the run that settled the tray turned up something else I'd got wrong.

What survives, which is most of it

The finding I was going to publish was wrong. The method that produced it was not—and I'd argue this outcome makes the case for mapping stronger, not weaker.

A cabinet with a genuine coverage defect is a rare thing. A tray put in backwards is something anyone can do, on any machine, on any given Tuesday. There's no indicator for it. No error, no warning, nothing that looks out of place—the tray seats perfectly well either way round, which is exactly why I never thought to question it. The chips just come out unerased.

And if I'd been loading the middle of the tray like a sensible person, they'd have come out fine—right up until the day I filled it and the outer positions went into somebody's envelope having taken a partial dose. That's the failure mode I spent Part 1 arguing you cannot detect, arriving by a route I hadn't imagined.

The position map caught it. Nothing else I did would have. Not the threshold work, not the timing, not the tubes, and certainly not a blank check—the chips from that end read as unambiguously programmed, which is the one mercy in the whole business.

And there's a sting in it that I want to be explicit about, because it's the reason this is worth a thousand words rather than a shrug.

A chip from the unlit end is safe, in the sense that matters. It comes out fully programmed and fails its blank check loudly and honestly. You would notice.

The dangerous position is the one I still haven't measured: somewhere partly lit. A chip from that boundary clears its fast cells, passes a blank check clean, and goes out the door with its slowest cells barely over the line—the exact failure I spent Part 1 arguing you cannot see. The unlit end is harmless because it's obvious. The margin around it isn't.

Which is why the map matters, and why I'd now say the four-step procedure from Part 1 was incomplete. Finding your threshold isn't enough. You have to find out where in your machine that threshold actually applies—and "wherever the tray puts the chips" is not an answer, as I have now demonstrated at some length.

Capacity, while I was in there: the unit is rated for thirty chips. With 28-pin parts I fit twenty-five. The thirty is presumably quoted for 24-pin packages. If you run 27C512s or 27C256s, twenty-five is your number.

The tubes I bought and didn't fit

The replacement tubes arrived that afternoon, halfway through the session. A cross-reference part, correct base, correct envelope, correct wattage.

They're still in their sleeves, and they're going to stay there—which makes twice in one day that I diagnosed a problem this machine didn't have.

Two PLT AU/LG06T5 germicidal tubes sealed in paper sleeves and rubber-banded together, labelled G6T5 with an ultraviolet hazard warning.

Still in the sleeves. G6T5 / AU-LG06T5—the right part, bought for a problem the machine turned out not to have.

Because the measurement I only got to make by accident says the old ones are fine. Thirty-year-old original tubes clear a fully programmed chip in under two minutes. There is no degradation here to fix. The premise of the purchase—that a machine this old must need lamps—was an assumption I made in a checkout page and never tested.

And a swap now would be a downgrade in what I know. The tubes I'd be fitting are cross-referenced on physical dimensions and wattage, not on verified output at 254 nm. I'd be trading a pair I have measured for a pair I have assumed, on the strength of a hunch that the measured pair is worn out—which the measurement says it isn't.

So they go on the shelf as spares, and they get fitted the day the originals fail. Which, on this evidence, may be a while.

I'd rather report that than the before-and-after I was planning, because I suspect a lot of people in this hobby buy the tubes first—I did—and never find out whether they needed them. The tubes were the cheap part. Finding out I didn't need them cost one afternoon and a handful of chips I was going to spend anyway.

The scorecard

Prediction from Part 1 Result
"It'll clear a chip in three to eight minutes" Wrong. Blank at two minutes; threshold under 1:50. Too slow again, same direction as last time
"Bit 7 will lag again" Wrong. Bit 0 and bit 6, in two clusters, each on a 128-byte stride
"The specimens will hold" Right at nine days. Both clean; one month still to come

Two out of three wrong. I said in Part 1 that I'd put money on all of them, and I would have.

The third one is genuinely unfinished. There are two chips in a bag—one erased comfortably, one that passed by five seconds—and the whole retention argument rests on whether the marginal one drifts while the other doesn't. That takes a month to find out, and I'm not going to pretend otherwise. I'll add the result to this post when I have it.

Update: the tray was fine, and I was wrong about something else

Two days after publishing this, I went back to settle the one loose end—I'd checked the tray fix by eye, not with a chip, and said so.

So: seven freshly programmed chips, spread across the whole tray in a proper grid, tray the right way round, four minutes. And because the unit hadn't been switched on since the previous session, it started stone cold.

Row Failing bytes
Top row 65,536 and 65,528
Middle row 0, 0, 0
Bottom row 35,715 and 36,877

The middle of the tray was perfect. The outer positions were not—one pair barely touched, the other pair about 45% of the way through.

Warm the lamp up and run it again, and the whole tray clears.

So the tray is settled, and the correction is somewhere else entirely. Look at the last line of the next section, in the version of this post I published two days ago: "It doesn't need pre-warming at that setting—at twice the threshold the warm-up is a small fraction of the total."

That is wrong, and this run is why. I'd concluded it from a cold run that came out clean—but that run only used positions in the middle of the tray, which is exactly where the margin is greatest. The moment I put chips where the margin is thinnest and started genuinely cold, four minutes wasn't enough. Not marginally short. Nothing.

Warm-up doesn't stop mattering once you're past threshold. It matters wherever a position has the least margin—and those are precisely the positions you stop checking once the middle of the tray starts passing. Which is the same mistake, in a new costume, as measuring uniformity at the knee.

So the recipe gains a step back: run the lamp empty for a couple of minutes, then load. I haven't yet measured the minimum warm-up, so I'm not going to hand you a number I don't have.

Update: the specimens held at nine days

Both chips read blank.

O1—the comfortable one, seven minutes under a cold lamp—returned zero failing bytes on five consecutive reads. O5, the chip that showed 72 bad bytes at 1:10 and came back clean five seconds later at 1:15, also read zero.

The interval is nine days, not seven. The one-week re-read fell on a Saturday I spent hosting a club barbecue, and I got to it the following Monday. Nine is the number that happened, so nine is the number in the table.

One month is September 8. Both chips are back in the bag until then.

What I'd actually tell you now

Revising what I wrote last time, because this changes the procedure:

  1. Check the interlock. Ten seconds, and it's the only item on this list that can hurt you.
  2. Program a chip to all zeros so the failure count means something, and use a fresh one for every data point.
  3. Pre-warm the lamp before any timed run—including production runs, not just measurements—and never build a ladder out of short bursts.
  4. Find the threshold with single continuous exposures. Where it first passes is your machine, your geometry, your lamps, today.
  5. Map your positions at twice the threshold—not at it. Put a chip in every corner you'd ever use. This is the step I'd have skipped, and it's the one that caught my tray.
  6. Map them cold as well as warm. The corners on a cold lamp are the thinnest margin in the machine, and they are the last place you'll think to look.
  7. Check whether your tray can go in more than one way, and know which way is right. Mine goes in either way and only one of them works. I would not have thought to write that down a week ago.
  8. Run production at twice the threshold, inside the mapped area, on a warm lamp.

Both machines turned out to be far faster than the folklore says, and neither of those facts was visible from a blank check.

Mine now runs four minutes, tray the right way round, on a lamp that's had a couple of minutes to wake up.

I bought it tubes it didn't need and accused it of a fault it didn't have. It needed measuring. It didn't need parts.

Frequently asked

Why is my EPROM eraser not erasing chips?
Before blaming the lamps, check two cheaper things. First, lamp warm-up: on my unit a full production exposure of four minutes, started from a genuinely cold lamp, left chips at the edges of the tray completely unerased—the same four minutes clears the whole tray once the lamp is warm. Second, where the chips sit—if a tray or foam insert can be fitted more than one way, the wrong orientation can put chips outside the lit area entirely, and there is no warning when it does.

Does a UV eraser need to warm up before you use it?
Yes, and it matters more than I expected. On this machine a 1:45 exposure erased nothing at all from cold and very nearly finished the job pre-warmed. Even at twice the erase threshold, a cold start left the lowest-margin positions on the tray untouched at four minutes. Run the lamp empty for a couple of minutes before loading chips.

How long does a UV eraser take to erase an EPROM?
Far less than the folklore says. Measured with an all-zeros M27C512 as the test article, a Spectroline PC-2000 cleared a chip in about seventy-five seconds and my two-tube unit in about a hundred and ten—both on original, decades-old lamps. The usual "ten to twenty minutes" advice is off by roughly an order of magnitude for both machines, but the only number that matters is the one you measure on yours.

Do old UV eraser tubes need replacing?
Not automatically. The original Spectronics BLE-6254S tubes in my thirty-year-old unit clear a fully programmed chip in under two minutes, which is not the behavior of worn-out lamps. Measure the erase threshold before buying replacements—a cross-referenced tube is matched on base, envelope and wattage, not on verified output at 254 nm, so swapping trades a measured pair for an assumed one.

Further reading


I'm Jeffrey Mays. Bench Notes is where I write up the actual workshop work—burns, builds, repairs, and the occasional afternoon spent building an airtight case against a machine that turned out to be innocent. Chip data captured on a Needham's Electronics EMP-20; erase-dose figures from the STMicroelectronics M27C512 datasheet. The PC-2000 in Part 1 was lent by a local collector and has gone home with a written report. Subscribe to catch the next one.

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